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chk015a - sma ref. : dschk015asma3021 - 21 jan 13 1 / 12 specifications subject to change without notice united monolithic semiconductors s.a.s. bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 15w power packaged transistor gan hemt on sic description the chk015a - sma is an unmatched p ackaged gallium nitride high electron mobility transistor. it offers general purpose and broadband solution s for a variety of rf power applications. it is well suited for multi - purpose applications such as radar and telecommunica tion the chk015a - sma is developed on a 0.5m gate length gan hemt process . it requires an external matching circuitry . the chk015a - sma is available in a ceramic - metal flange power package providing lo w par asitic and low thermal resistance. main features v ds = 50v, i d_q = 100ma, freq = 5.6ghz cw mode intrinsic performances of the packaged device ds = 50v @ i d_q = 1 00ma 6 hours @ tj = 200c main electrical characteristics tcase = + 25c , cw mode , f = 5.6 ghz , v d s =50v, i d _ q = 1 0 0ma symbol parameter min typ max unit g ss small signal gain 15 - db p sat saturated output power 15 18 - w pae max power added efficiency 45 5 0 - % g pae_max associated gain at max pae 1 1 - db 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 5 10 15 20 25 30 35 40 45 50 55 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 drain current (a) gain (db), pout (dbm) & pae (%) input power (dbm) pout pae gain id
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 2 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended dc operating ratings tcase= +25c symbol parameter min typ max unit conditions v ds drain to source voltage 20 50 v v gs_q gate to source voltage - 1.9 v v d = 50v, i d_q = 1 00ma i d_q quiescent drain current 0. 1 0.35 a v d = 50v i d _max drain current 0.65 (1) a v d = 50v, c ompressed mode i g_max gate current (forward mode) 0 8 ma compressed mode t j _max junction temperature 200 c (1) limited by dissipated power dc characteristics tcase = +25c symbol parameter min typ max unit conditions v p pinch - off voltage - 3 - 2 - 1 v v d = 50v, i d =i dss /100 i d_sat saturated drain current 2.7 (1) a v d = 7v, v g = 2 v i g_leak gate leakage current (reverse mode) - 1 m a v d = 50v, v g = - 7v v bds drain - source break - down voltage 200 v v g = - 7v, i d = 20ma r th thermal resistance 6.4 c/w (1) for information, limited by i d _max , s ee on absolute maximum ratings rf characteristics tcase= +25c, cw mode , f = 5.6 ghz , v ds =50v, i d_q =1 00ma symbol parameter min typ max unit g ss small signal gain 1 3 1 5 - db p sat saturated output power 15 18 - w pae max power added efficiency 45 5 0 - % g pae_max associated gain at max pae 1 1 - db these values are the intrinsic performance of the packaged device. they are deduced from measurements and simulations. they are considered in the reference plane defined by the leads of the package, at the connection interface with the pcb. the typical pe rfor mance achievable in more than 10% frequency band around 5.5 ghz was demonstrated using the reference board 6149954 6 presented hereafter.
15w power packaged tran sistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 3 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, av enue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 absolute maximum ratings tcase = +25c (1) , (2), (3) symbol parameter rating unit note v ds drain - source voltage 60 v v gs _q gate - source voltage - 10, +2 v (6) i g _ max maximum gate current in forward mode 25 ma i g _ m in maximum gate current in reverse mode - 4 ma i d_ max maximum drain current 2 a (4) p in maximum input power (typical) 3 4 dbm (5) t j junction temperature 220 c t stg storage temperature - 55 to +150 c t c ase case operating temperature see note c (4) ( 1) operation of this device above anyone of these parameters may cause permanent damage. (2) duration < 1s. (3 ) the given values must not be exceeded at the same time even momentarily for any parameter, since each parameter is independent from each other, otherwise deterioration or destruction of the device may occur . (4) max junction temperature must be considered (5) @ 6 ghz - link ed to and limited by i g_max & i g_min values (6) v gs _q max limited by i d _max and i g _ max values
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 4 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 simulated source and load impedance v ds = 50v, i d_q = 1 00ma frequency (mhz) source load 1000 1.82 + j 9.58 42 + j4 8.6 2000 0.84 C C C C C C C zload zsource
15w power packaged tran sistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 5 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, av enue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical s - parameters tcase= +25c, cw mode, v d =50v, i d_q =1 00ma , phase s(i,j) in freq (ghz) mag s(1,1) phase s(1,1) mag s(2,1) phase s(2,1) mag s(1,2) phase s(1,2) mag s(2,2) phase s(2,2) 0.25 0.912 - 82.5 30.268 129.4 0.014 42.4 0.649 - 38.3 0.5 0.868 - 123.0 19.526 102.4 0.017 18.4 0.542 - 58.0 0.75 0.854 - 143.5 13.768 85.8 0.017 5.2 0.517 - 71.6 1 0.851 - 156.0 10.431 73.3 0.017 - 3.6 0.527 - 83.4 1.25 0.852 - 164.9 8.291 62.9 0.015 - 9.6 0.551 - 93.9 1.5 0.855 - 171.9 6.814 53.6 0.013 - 13.3 0.581 - 103.5 1.75 0.859 - 177.9 5.739 45.1 0.012 - 14.3 0.612 - 112.2 2 0.863 176.8 4.928 37.2 0.010 - 11.7 0.641 - 120.2 2.25 0.866 171.8 4.298 29.9 0.008 - 4.0 0.668 - 127.6 2.5 0.870 167.1 3.800 22.8 0.007 9.6 0.692 - 134.5 2.75 0.872 162.5 3.401 16.2 0.008 26.2 0.714 - 140.9 3 0.874 157.9 3.076 9.7 0.009 39.8 0.733 - 146.9 3.25 0.875 153.3 2.809 3.4 0.011 47.8 0.750 - 152.6 3.5 0.876 148.7 2.590 - 2.7 0.014 51.4 0.764 - 158.1 3.75 0.876 144.0 2.408 - 8.7 0.017 52.2 0.776 - 163.4 4 0.875 139.1 2.257 - 14.7 0.020 51.2 0.786 - 168.5 4.25 0.873 134.0 2.131 - 20.6 0.024 49.0 0.794 - 173.5 4.5 0.870 128.8 2.027 - 26.6 0.027 45.9 0.801 - 178.5 4.75 0.867 123.3 1.942 - 32.7 0.032 42.3 0.807 176.6 5 0.863 117.4 1.872 - 38.8 0.036 38.1 0.811 171.6 5.25 0.858 111.3 1.815 - 45.2 0.040 33.4 0.814 166.6 5.5 0.853 104.7 1.770 - 51.7 0.045 28.4 0.816 161.5 5.75 0.847 97.7 1.734 - 58.5 0.050 22.9 0.818 156.2 6 0.841 90.2 1.707 - 65.5 0.056 17.1 0.818 150.7 6.25 0.835 82.2 1.687 - 73.0 0.061 10.8 0.818 144.9 6.5 0.829 73.6 1.672 - 80.7 0.067 4.1 0.817 138.8 6.75 0.824 64.5 1.660 - 89.0 0.073 - 3.1 0.815 132.3 7 0.820 54.7 1.649 - 97.6 0.079 - 10.8 0.814 125.2 7.25 0.817 44.3 1.638 - 106.8 0.086 - 19.0 0.811 117.4 7.5 0.818 33.4 1.625 - 116.5 0.092 - 27.8 0.809 108.9 7.75 0.821 22.0 1.605 - 126.8 0.097 - 37.1 0.806 99.4 8 0.828 10.3 1.577 - 137.7 0.102 - 47.0 0.803 88.9 8.5 0.851 - 13.5 1.486 - 160.9 0.109 - 68.4 0.799 64.3 9 0.883 - 36.8 1.334 174.1 0.109 - 91.5 0.802 34.9 9.5 0.915 - 58.3 1.124 148.5 0.102 - 115.2 0.819 2.6 10 0.940 - 77.5 0.887 123.9 0.088 - 138.1 0.849 - 29.2 10.5 0.956 - 93.8 0.663 101.6 0.072 - 158.8 0.885 - 57.4 11 0.966 - 107.7 0.481 82.4 0.057 - 176.8 0.916 - 80.6 11.5 0.973 - 119.4 0.346 66.3 0.045 167.7 0.94 - 99.4 12 0.976 - 129.5 0.249 52.7 0.035 154.0 0.956 - 114.6 12.5 0.979 - 138.2 0.182 41.4 0.028 141.6 0.966 - 127.0 13 0.980 - 145.9 0.135 31.9 0.023 130.1 0.972 - 137.3 13.5 0.98 - 152.7 0.101 23.9 0.019 119.0 0.975 - 146.0 14 0.979 - 158.8 0.078 17.1 0.016 108.5 0.975 - 153.5 14.5 0.977 - 164.3 0.061 11.5 0.014 98.7 0.975 - 160.1 15 0.976 - 169.4 0.049 6.7 0.012 90.0 0.974 - 165.9
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 6 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 maximum gain & stability characteristics tcase= +25c, cw mode, v d =50v, i d_q =1 00ma 0.0 1.0 2.0 3.0 4.0 0 5 10 15 20 25 30 35 40 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 k factor max. gain (db) frequency (ghz) maximum gain k factor
15w power packaged tran sistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 7 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, av enue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 typical performance on demonstration board ( ref. 6149954 6 ) calibration and measurements are done on the connector reference accesses of the demonstration boards. tcase = +25c, cw mode measured id, pout, gain & pae f = 5.6 ghz, v ds = 50v, i d_q = 1 00ma measured pout, gain & pae pin=33dbm , v ds = 50v, i d_q = 100ma 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5 10 15 20 25 30 35 40 45 50 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 drain current (a) gain (db), pout (dbm) & pae (%) input power (dbm) pout pae gain id 0 5 10 15 20 25 30 35 40 45 50 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 gain (db), pout (dbm) & pae (%) frequency (ghz) pout pae gain
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 8 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 demonstration amplifier low frequency equivalent schematic (ref. 6149954 6 ) demonstration amplifier / bill of materials (ref. 6149954 6 ) designator type value - description qty c1 capacitor 0.2 pf, +/ - 0. 05 pf, 0603 1 c2 capacitor 1.2 pf, +/ - 0.1pf, 0603 1 c3 capacitor 2pf, +/ - 0. 1pf , 0603 1 c4 capacitor 18 pf, +/ - 5%, 0603 2 c 5 capacitor 39 pf, +/ - 5%, 0805 2 c6 capacitor 180 nf, +/ - 5%, 0805 2 c7 capacitor 10nf, +/ - 5%, 0805 2 c8 capacitor 1f, +/ - 10%, 1204 1 r1 resistor 360 ?, +/ ? +/ j2 j3 + + vg vd
15w power packaged tran sistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 9 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, av enue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 demonstration amplifier circuit (ref. 61499546)
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 10 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 package outline ( a ) tcase locates the reference point used to monitor the device temperature. this point has been taken at the device / system interface to ease system thermal design. ( b ) chamfered lead indicates the gate access of the packaged transistor. tcase (a ) (c) tcase (a ) (c)
15w power packaged tran sistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 11 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, av enue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended assembly procedure chk015a - sma is available has a flange package to be bolt down onto a thermal heat sink also used as main electrical ground. use preferably screw m2 and flat washers. thermal and electrical resistance at the package to heat sink interface has to be as low as possible. thermal electrically conductive grease or conductive thin layer like indium sheets are recommended between the package and the heat sink. in case a thermal grease is selected, we recommend to use material offering thermal conductivity >5w/m.k and electrical resistivity <0.01 ohm.cm. the grease layer thickness should be about 25m (1 mil). contact interface quality can be improved by cleaning p rocess prior device mounting on the heat - sink. such operation will enhance the thermal and electrical contact by oxide removal at each interface. package leads can be soldered on printed circuit boards tr
15w power packaged transistor chk015a - sma ref. : dschk015asma3021 - 21 jan 13 12 / 12 specifications subject to change without notice bat. charmille - parc silic - 10, avenue du qubec - 91140 villebon - sur - yvette - france tel.: +33 (0) 1 69 86 32 00 - fax: +33 (0) 1 69 86 34 34 recommended environmental management ums products are compliant with the regulation in particular with the directives rohs n2011/65 and reach n1907/2006. more environmental data are available in the application note an0019 also available at http://www.ums - gaas.com . recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. ordering information package: chk015a - sma /xy tray : xy = 26 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to cha nge without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.

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